Minimin 20k Sign-On Bonus – FPGA/ASIC Senior Design Engineer – Tucson, AZ (Onsite)

Job title: Minimin 20k Sign-On Bonus – FPGA/ASIC Senior Design Engineer – Tucson, AZ (Onsite)

Company: Raytheon

Job description: applications: gigabit serial interfaces, Radio Frequency (RF) and Electro-Optical (EO) DSP, controls, data links, embedded… processing and processor interfaces. Designers work with circuit card designers and systems engineers to develop requirements…

Expected salary:

Location: Seattle, WA

Job date: Sun, 03 Sep 2023 04:17:33 GMT

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